ID: 58798
2 Openings
Guadalajara

SystemC Modeling Developer

Lead II - Embedded Software

Who We Are:

Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world.

UST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries. Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live.

With us, you’ll create a boundless impact that transforms your career—and the lives of people across the world.

Visit us at UST.com.

You Are:

UST is searching for a skilled SystemC Modeling Developer to join our Server Architecture & Performance Engineering team. In this role, you will design and develop SystemC/TLM models for next-generation Compute and AI server platforms, enabling architecture exploration, performance analysis, and pre-silicon software development. This is a high-impact opportunity to directly influence future server SOC and platform designs.

The opportunity:

• Develop SystemC/TLM2.0-based functional, timing, and performance models for server subsystems (CPU, memory, I/O, accelerators, AI engines).

• Build modular, scalable models for Compute & AI workloads and integrate them into simulation frameworks.

• Perform system-level performance modeling, profiling, and bottleneck analysis across compute, memory, and accelerator paths.

• Support pre-silicon BIOS, firmware, and driver enablement using virtual platforms.

• Validate models against RTL or hardware references to ensure functionality and accuracy.

• Work with simulators such as Synopsys Virtualizer, Cadence VSP, QEMU-based frameworks, etc.

• Collaborate with architects, RTL designers, platform engineers, and performance teams to align modeling results with product goals.

• Document model features, APIs, interfaces, and usage workflows for internal teams.

This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

What you need:

• Bachelor´s or Master´s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.

• 8+ years of experience in the following areas:

• SystemC/TLM modeling, TLM2.0, and C/C++.

• Computer architecture including CPU pipelines, cache hierarchy, memory controllers, PCIe/CXL, and AI/compute subsystems.

• Pre-silicon simulation, or architectural modeling for semiconductor/server platforms.

• Cycle-accurate, timing-accurate, or transaction-level modeling.

• Pre-silicon simulation flows and virtual platform development.

• Performance data, interpret system behavior, and provide optimization insights.

• Debugging skills in complex simulation environments.

Benefits

Employees receive mandatory and non-mandatory benefits such as fourteen (14) days of vacation beginning on the date of hire, vacation premium, ten (10) paid holidays, a Christmas Bonus of thirty (30) days’ pay, Monthly Food Vouchers, Saving Fund, and health insurance. Certain employees may be eligible for additional Company benefits beginning on the date of hire, including dental, disability and life insurance plans; four (4) days of personal time off per year, up to three (3) days of paid medical leave per year, and up to three (3) days of paid bereavement leave per year.

What we believe:

We proudly embrace the values that have shaped UST since day one. We build our culture of Humility, Humanity, and Integrity. These values inspire us to nurture a people-first, human centric culture that fosters diversity, prioritizes sustainable solutions, and keeps our people and clients at the forefront of all decisions.

Humility:

We will listen, learn, be empathetic and help selflessly in our interactions with everyone.

Humanity:

Through business, we will better the lives of those less fortunate than ourselves.

Integrity:

We honor our commitments and act with responsibility in all our relationships.

An Equal Opportunity Workplace, Free of Discrimination and Harassment

At UST, we strive to provide a work environment free of discrimination and harassment. We are an equal opportunity employer and employment decisions are based on merit and business needs. Our Human Rights Policy further illustrates our stand on this. We are committed to following fair employment practices that provide equal opportunities to all employees. We do not discriminate or allow harassment on the basis of race, color, religion, disability, gender, national origin, sexual orientation, gender identity, gender expression, age, genetic information, military status, or any other legally protected status. At UST, we value diversity and believe that a diverse workplace builds a competitive advantage.

Un lugar de trabajo con igualdad de oportunidades y libre de discriminación y acoso

En UST, nos esforzamos por proporcionar un ambiente de trabajo libre de discriminación y acoso. Somos un empleador que ofrece igualdad de oportunidades y basa las decisiones de empleo en los méritos y las necesidades del negocio. Estamos comprometidos a seguir prácticas de empleo justas que brinden igualdad de oportunidades a todos los empleados. No discriminamos ni permitimos el acoso por motivos de raza, color, religión, discapacidad, género, origen nacional, orientación sexual, identidad de género, expresión de género, edad, información genética, estado militar o cualquier otro estado legalmente protegido. En UST, valoramos la diversidad y creemos que un lugar de trabajo diverso construye una ventaja competitiva.

UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.

embedded c++,systemc,firmware,pre silicon validation,