Glassdoor users rated their interview experience at Texas Instruments as 100% positive with a difficulty rating score of 2 out of 5 (where 5 is the highest level of difficulty). Candidates interviewing for Accounting Intern and rated their interviews as the hardest, whereas interviews for Accounting Intern and roles were rated as the easiest.
The hiring process at Texas Instruments takes an average of 30 days when considering 1 user submitted interviews across all job titles. Candidates applying for Accounting Intern had the quickest hiring process (on average 30 days), whereas Accounting Intern roles had the slowest hiring process (on average 30 days).
Basic questions on STA, projects, verilog etc. some aptitude questions aswell. Other topics included fsms and sequential logic design. The interviewers were supportive and Inclusive. Overall, a nice experience and foundational questions were asked.
Interview questions [1]
Question 1
design 2x1 MUX using nor gates and give the approximate PPA
Lots of various technical questions relating to digital and analog ic design that weren't very difficult. The interviewer was friendly and asked relevant questions. Overall, the whole experience wasn't stressful.
I applied through college or university. The process took 1 week. I interviewed at Texas Instruments (Nueva Delhi) in Aug 2024
Interview
The on-campus intern hiring process was divided into 2 rounds :
1. OA (Online Assessment)
2. Technical Interview Round
TI hired interns for 3 profiles: Analog, Digital and Embedded. OA has an aptitude section (20 questions), and other sections based on the profile(s) opted for. I had opted for analog and digital profiles, so I had two more sections digital section - questions asked were mainly of digital electronics, very few questions from computer architecture and C language, analog section - question from network analysis, BJT, MOSFETs, Op- Amps, etc. I got selected for digital profile interview round.
Interview started by me explaining my project, then they asked basic verilog questions (forever, always vs initial, etc). Then they gave me 2 sequences and asked to design a state machine to detect the two sequences (even if they occur in overlapping manner). I had to give them the solution using minimum states at the first attempt (without going for state reduction). Then they asked me to draw diagram for 3 bit johnson counter, explain, write verilog code for it. Difference between blocking vs non blocking statements. Asked me to draw half adder, full adder circuits, explain. Same for Priority encoder, write verilog code for the same. Asked me about LFSR. Then they gave me a question about hamming codes and parity, which I was unable to solve at that point of time. Asked me to build gate logic using 2:1 MUX and questions on the same line. Asked me 1 question regarding Object oriented programming (since I had mentioned that on my resume).
Interview questions [1]
Question 1
Asked me to design a state machine to detect two different sequences (overlapping case) using minimum states without going for state reduction.