Interview questions were on core electronics concepts. Digital electronics mainly
Asic Engineer Interview Questions
1,075 asic engineer interview questions shared by candidates
Basic Verilog code questions, such as latch inferences, correct assignations (not mixing blocking/non blocking), FSM, etc
CDC and related concepts. Clock main issues, metastability, glitching, etc, and the possible solutions
Where do you see yourself in 5 years?
Asked questions about clock domain crossing , low power techniques
What are setup time and hold time?
Why OOPs is important
Static Timing Analysis questions.
Explain the last project
How does Cadence Encounter solve setup time violations before CTS
Viewing 1041 - 1050 interview questions
See Interview Questions for Similar Jobs
Vlsi Design EngineerSenior Vlsi Design EngineerVlsi EngineerAsic Physical Design EngineerSenior Asic Design EngineerSoc Design EngineerRtl Design EngineerHardware Asic Design EngineerPhysical Design EngineerSenior Dft-ingenieurHardware Engineering ManagerHardware Asic Ontwerp IngenieurSenior Fpga Design EngineerFpga Design EngineerFpga Development EngineerSenior Hardware Design EngineerSenior Asic Fpga Design EngineerAsic Design Verification Engineer