Write UVM Monitor for the defined case.
Asic Engineer Interview Questions
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1 : What's a strength / weakness of yours? 2.a : draw a circuit that implements the XOR operation using NAND gates 2.b : implement some memory unit (flip flop) for the output of the circuit 2.c : make one of the inputs of this circuit the input of another flip flop and its output the input to the XOR function 2.c.i : I kind of unintentionally prompted a question from them when I asked if the flip flops should be operated by the same or separate clocks. They proceeded to ask me what would happen if it was the latter case. 2.d : discuss what timing constraints you would need to be aware of for this circuit to function 2.e : how would you make the circuit run faster? what if timing constraints weren't met? what you need to do then? 2.f : code this circuit in verilog
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Draw a T flip flop using simple gates.
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