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1. Frequency divider circuits. 2. JK flip flop truth table and circuit gate based implementation. 3. Sequence detector using FSM for 00100 overlapping. 4. Usage of clock in sequential circuits. 5. setup and hold time. 6. How do you express frequency in terms of setup and hold times. 7. 1 aptitude question. (only this question not answered properly)
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Digital Design Engineer

Interviewed at Qualcomm

3.8★
Mar 22, 2021

1. Frequency divider circuits. 2. JK flip flop truth table and circuit gate based implementation. 3. Sequence detector using FSM for 00100 overlapping. 4. Usage of clock in sequential circuits. 5. setup and hold time. 6. How do you express frequency in terms of setup and hold times. 7. 1 aptitude question. (only this question not answered properly)

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