Regarding Pillar Trims and Jigs and fixtures
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5: universal gates
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They had some questions relating to different kinds of problem solving. Some where practical and others where theoretical.
What impact does the width of the nMos gate have on the performance of the transistor.
Tell me something about yourself?
Shortly after the phone interview, the same VP sent me an email. She asked me to answer the questions in her email before bring me for an on-site interview. Here are the questions she asked me to answer: 1. How to get higher Psat and at same time to keep high gain? 2. How do you define tapered waveguide? 3. What is the disadvantage if the waveguide is tapered? 4. How to design the tapered waveguide? 5. Which parameters are limited the modulation speed? 6. What is "multi-contact device"? what is the benefit? 7. Why is VCSOA insensitive to the polarization of input signal? 8. How to design VCSOA? 9. How do you control the polarization sensitivity of an asymmetric structure of MQW SOA? 10. How to design QD SOA? What are the key parameters?
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