Digital Design - critical path, bit manipulation, logic questions, hardware design for your code using adders and gates Verification - assertions, constraints, coverage, OOPs (they will dig into this) virtual functions, polymorphism
Design Verification Engineer Interview Questions
951 design verification engineer interview questions shared by candidates
How would you sort 10 integers in ascending order?
AI questions included about auto encoders, lstms, basics of neural network, convolutional neural networks etc.
All kinds of questions regarding Op-Amp My own research ADC/DAC, INL/DNL, distortion, etc. CMOS, Bipolar device basics (operation regions, I-V curve, equations, noise, etc)
UVM environment and how it works?
Describe Yourself, project related question.
Do you know how to parse directories in Python?
First round was a simple online test Two consecutive rounds were tech hrs Questions mainly focused on setup and hold time,digital analog, communication,projects done mentioned in the resume.
Write a uvm driver for a simple valid-ready protocol. - When data is available assert the valid - Keep the data stable and valid high until ready is asserted - De-assert the valid once ready is asserted interface if input clk; logic [15:0] Data; logic Valid; logic Ready; endinterface
Write a test plan for 2x2 switch arbiter
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