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Design Verification Interview Questions
1,115 design verification interview questions shared by candidates
Online interview: 1. What is polymorphism ? 2. Design a 3 bit shift register in verilog RTL ? 3. For a FIFO design, what kind of assertions will you write(what conditions would you check for proper functioning of the FIFO) ?
What is an isolation cell?
How do you find common elements between the arrays? reduce the complexity, asked me to write the code
First interview: describe a FSM for the result of a sequence of binary input mod 5. Merge sort. Second : C/ verilog coding.
Sorting, bit logic
What is the scope of a static variable? Given multiple scenarios(static variables across files, in recursion, ect.)
Leetcode easy questions were asked
class A; function int foo(); int a; return ++a; endfunction endclass program tb; A a; int b, c; initial begin for(int i = 0; i < 10; i++) begin b = a.foo(); c = foo(); $display("B = %0d", b); $display("C = %0d", c); end end function int foo(); int a; return ++a; endfunction
what is a uvm agent?
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