crazy nonsense questions. How do you measure voltage of the wave from modelsim in gtkwave.? each question on each word in resume.
Design Verification Interview Questions
1,114 design verification interview questions shared by candidates
Test cases for a 2 input, 2bit adder.
On projects and sv uvm based Protocol knowledge on what we mentioned in resume
mostly in uvm and sv
Constraint and assertion , gate level simulation
Questions on interface, clocking blocks, assertions, uvm, X propagation.
Describe what a virtual function does?
Asked me to tell about myself, past work I’ve done, what do I expect from my new team, manager, etc.
Dont remember much but mostly code deep dives and situational questions related to work.
Draw the circuit base on the coding provided
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