Difference between flip-flop and latch. What is jitter, clock skew? causes of jitter. What is metastability?
Digital Design Interview Questions
820 digital design interview questions shared by candidates
Would you do anything differently if you could start you thesis again?
What did you do in your previous relevant experience
Quelle est la logique interne a une clock gating cell ?
FIFO setup/hold time state machine
tell me about your previous experience
Tell me about a time that you learned a new skill.
Was asked to describe Projects in Resume,FIR vs IIR, Sampling theorem
Are you fine with doing thing repetitively?
Questions related to Basic Digital Design, Clock Dividers, Clock Domain Crossing(Very imp!!), RTL coding, FSMs, Valid - Ready protocols, Synthesis, Static timing analysis, Physical Design Fundamentals, Little bit Architecture, very basic analog touch up (easy), very few DSP related questions(easy)
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