I do not remember the actual verbiage, but the question related to having failures in my FPGA designs.
Hardware Engineer Interview Questions
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Draw a state machine that does some function.
Draw a real (not ideal) capacitor
could you explain in details the project you had done which you think might benefit our company?
Tell me what ur uself
Embedded hardware, PCB layout and RF design
1.)They gave an input data stream A0, A1, A2, A3… and asked me to design a circuit such that it calculates the sum of the previous two inputs, one clock cycle later. For example: when A2 arrives at that clock cycle, the output should be A0 + A1. When A3 arrives, the output should be A1 + A2. Then they modified the question and asked for the cumulative sum of all previous inputs: For example: when A2 arrives, the output should be A0 + A1. When A3 arrives, the output should be A0 + A1 + A2. 2.)They asked me about 2-bit comparators and the design process. Then they extended the problem: using external logic gates, design a 2-bit comparator assuming you are provided with multiple 1-bit comparators. The comparator has two inputs and three outputs (A > B, A = B, A < B). For example, consider two 1-bit comparators for the MSB and LSB. If the MSB comparator gives A > B = 1, then what should we do for the LSB using logic gates? Similarly, what happens when A > B = 0, and so on for all three cases (A > B, A = B, A < B).
You see a radiated emissions failure at 180MHz and the failure repeats every 90MHz. What could the source of the radiation be?
Q: Logic Circuit Designing; Verilog and VHDL; PCB Designing; Optimising signal/power designs
First question was to explain Ohm's law
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