1st round: asked basic verilog questions like difference between wires & regs, difference between if-statements and case statements. Asked about projects on resume. Asked a small project and how I should approach it. 2nd round: gave a problem and had to create FSM and verilog.
Ingeniero Asic Interview Questions
1,076 ingeniero asic interview questions shared by candidates
Emerging technologies in the microchip industry
Mostly RCG level questions.
1. Technical 2. Aptitude
Write TB for one of the projects from past experience . Describe its features and implement DUT interface connections and build TB on whiteboard .
Metastability
Convert D flip flop to T flip flop. What is propagation delay of inverter? What is STA?
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
What's your name , is it [name] ?
Compare the analog and digital PLL, pros and cons
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