Explain set up and hold time
Physical Design Interview Questions
711 physical design interview questions shared by candidates
2. Draw Layout of inverter
according to your previous projects.
Where did you apply [skill listed in resume] in your projects?
Describe what have you done in previous job.
How do you plan to study your Masters?
write down an inverter build from cmos transistors
Cmos transistor behavior and questions on my projects
Show me a cross section layout of nand gate using cmos.
Telephonic:Process and Temp variation for delays,Voltage and TEmperature effect on Metal LAyer,Synthesis flow:Inputs.How do u do floorplanning.?Power types and methods to control,DRC,challenges during placementa nd congestion Onsite; First ROund:Whole RTL to Netlist flow in detail,Timing correlation,miller effect,virtual routes),Sceond ROund: How do u solve DC and ICC correlation:DC putting lots of buffers-Reasons,How will u solve clock transition if sizing is not posibble(Explain MErging), 3rd Round : TECH DRC Questions :One problem was given :write a script to replace with right optimized via in power plan .4th Round :STA problems,3 equations -waveforms;derate effects,positive and negative edge flops at capturing end.5th ROund: Custom Bus routing (How to do manually for timing critical path),Script to find occurences of via in design by reference name and reduce runtime by not using get_cells twice.
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