Basic Verilog questions, FSM, Synchronizers, Clock Domain Crossing, Sequence detectors, Clock divider circuits, FIFO, Async FIFO, Circuit to detect the number of 1's using adders and then using only combinational logic, Transpose a Matrix using C. I was asked to code on almost all of the topics mentioned above.
Some system verilog Questions
Basically covered VLSI basics, ASIC flow basics (each step) and scripting. Friendly chat for behavioral interview.
On which port does ping works
Program to differentiate even and odd number Draw and explain NOT and NAND gate Draw a stick diagram for NOT gate Find ways to make NAND gate a NOT gate Explain methods of verifying your design, such as DFT Scan path.
1. Few questions on writing constraints for certain scenarios. 2. FSM for number divisible by 3 3. UVM subscriber, sequences, TLM ports and FIFO. 4. write code for random number generation for given distribution and ranges. 5. byte addressing in an integer memory system. 6. constrain for non-overlapping segment-addresses generation. 7. Explain any testbench architecture you have worked on. 8. Lots of simple questions to test SystemVerilog and OOP concepts.
Resume shortlist were there Digital design questions were there Sta questions were there Verilog questions were there Computer architecture questions were there Device physics questions were there Some puzzles were there Hr questions were there
Prepare well for the interview
been too long dont remember any questions
Pick a recent project to present
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