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Verification Engineer Interview Questions
2,559 verification engineer interview questions shared by candidates
What are the 1st two lines of codes in a typical UVM test?
You have a black box which sorts 2 numbers: big and small (an ouput of a box: smallest and highest) The question has two sections: Section A: Create a system which sorts 4 numbers
Section B: Make your previous system to sort 5 numbers:
Make a counter design with code
they give me a code in assembly , was a problem in the code and I asked to fined the problem
1. In a certain protocol why the ready signal is inout instead of out? 2. About the refresh in DDR2 3. FSM 4. System Verilog, Verilog, C, Perl, (also questions about OOP) 5. Bit operation
how does fork-join,join_any etc work
Design a system to test a memory device integrity over time.
Program for counting the number of ones in a 32 bit number Explain FIFO Design Program to reverse all the bits of a 32 bit number
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