What is the difference between combinational and sequential logic?
Verification Interview Questions
3,654 verification interview questions shared by candidates
1. finding the probability of possible combiations of a radom variable with given constraints. 2. Question related to System Verilog Assertions.
I think nothing... but few USB and DDR related stuff... as it was part of my resume...
All the problems are quite common . But some C program questions , such ass what is interrupt
Design a circuit to generate a pulse whenever the input flips.
There weren't a lot of difficult questions. Basically, they wanted to make sure that you can the appropriate knowledge in internet research, phone etiquette, and the appropriate Excel, Adobe, Word skills. Just be ready to answer how you would deal with doing repetitive work and what is more important between speed or accuracy.
What is a ID Ten T Error?
They wanted to know some obscure details about FDA regulations. I've worked in this industry for over 10 years and knowing the answer to that question has zero bearing on the success or failure of doing your job.
None that I recall.
Verification concepts.
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