Flow of current in a layout ( given randomly by the interviewer)
Physical Design Engineer Interview Questions
595 physical design engineer interview questions shared by candidates
layout related questions, and generic cmos question
PNR flow, Sta, OCV, AOCV Internship experience based questions Physical verification and Routing
was asked why 2 inverters are better that 1 buffer for fixing quality. and what the advantage of using 1 buffer that 2 inverters.
How to combine nmos and pmos with only one substrate?
Describe the transistor IV cruve
Make a CMOS inverter with MOSFETs
STA, PNR, and the Antenna effect. Basic logical gate circuit.
What are the differences between buffers and inverters? A ~30 minute discussion on this question followed.
What are some examples of scripts you have wrote, and give some scripting solutions to a problem, e.g. parsing timing reports.
Viewing 401 - 410 interview questions