Question on power optimization technique beyond what the tools have options, basically looking for some innovative way of power optimization.
Physical Design Engineer Interview Questions
595 physical design engineer interview questions shared by candidates
Coding to parse a netlist
The process for lightning protection studies.
Whether setup & hold will come in same path?
Explain ASIC Design Flow? Explain about Placement congestion and how to reduce it? Write a TCL script for searching a slack value which is violated in a report and write those values in another file?
what are different PV checks?
What is negative slack Does setup and hold occur in a single cycle Briefly explain place and route flow How to you efficiently build the clock tree
What is Leakage power? What is Short circuit power? Setup and hold violations NMOS and PMOS working
setup. hold. optimizations. transistor level questions. timing circuits
voltages across capacitors and resistors mix circuits
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