what is Synchronous reset and asynchronous reset?
Verification Design Engineer Interview Questions
953 verification design engineer interview questions shared by candidates
You are given a string that contains numbers, the arithmetic operators +, -, *, /, and various types of parentheses. Design and write pseudocode for a function that evaluates the expression and returns its numerical result.
All basic pipelining, hazards and their types, prevention techninques.
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
what is function overriding and overloading
Verify a packet processing DUT where packets coming in have a certain priority.
What is the difference between blocking and non-blocking assignments?
I was asked to write system verilog constraints for a variety of random stimulus needs.
Questions on C++, Perl, System Verilog.
Difference between Verilog and SV. Difference between blocking and non-blocking. Inheritance and virtual functions. Many C codes such as reverse an array, reverse bits of a number, get all even bits of a number, Fibonacci series, generate a random floating point number between a and b, Find a number in an array for which sum of all elements to its left= sum of all elements to its right. Few questions on digital logic such as finding minimum gates required for a given truth table, sequence detector, generate AND gate from 2 input mux etc.
Viewing 611 - 620 interview questions
See Interview Questions for Similar Jobs
Fpga Design EngineerVerification EngineerRtl Design EngineerVlsi Design EngineerLogic Design EngineerPhysical Design EngineerCpu Design EngineerElectrical Product Design EngineerSenior Vlsi Design EngineerSenior Fpga Design EngineerVerification ManagerSenior Asic Fpga Design EngineerApplication Design EngineerHardware Design EngineerSenior Physical Design EngineerIc Design EngineerFpga Development EngineerAsic Verification Engineer