Describe a time when you have to overcome a setback on a project.
Asic Design Engineer Interview Questions
710 asic design engineer interview questions shared by candidates
What is your thesis work?
It consisted of 2 rounds. In Round 1 they asked about basics of digital electronics, cro, osciloscope. In Round 2, they asked to code traffic light controller o verilog and discuss its area, power
Draw the FSM of detecting a sequence pattern "1101"
Digital VLSI
1. Resume based questions 2. some questions on previous project 3. Basic questions on Verilog coding 4. Some questions on UVM verification methodology
What's the purpose of Placement and what do we care about Placement.
Difference between half and full adder
Given a white-board diagram of a block with a FIFO, and verbal description of the block's inputs & outputs, write on the withe board the Verilog or SystemVerilog for the design. I had 15 minutes. Why would you want someone who goes straight to code, with no planning? That usually results in spaghetti code that has to be rewritten.
what is semi conductor .in depth concepts of it
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