Resume questions, fifo questions, assertions, coverage
Verification Engineer Interview Questions
2,564 verification engineer interview questions shared by candidates
General questions in Python, C, Verilog, and SystemVerilog.
1. About the company, why apple 2. About projects as per resume-interesting test case, negative test case 3. different types of Hazard and how to avoid those 4. pipelining concept 5. Problem-solving: (using associative array-)how to sort names without repetition
CDC, HW design, testbench engineering, etc..
coding questions consists of - creating sequences - creating constraints for a given problem - creating an algo for data query
How experienced are you with TCL? What needs to be done before sending a design out for fabrication?
How does an SRAM work?
How would you design a pipeline
The interviewer was from a different background, hence there wasn't any question-answer session
Can we override constraints like data members?
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